JIAO Xixiang1, 2 JING Lan1 QIAO Weimin1 MA Yunhai1 1. Design of hardware platform of digital adjustor for HIRFL-CSR power supply[J]. Nuclear techniques, 2010, 33(9): 705-708.
JIAO Xixiang1, 2 JING Lan1 QIAO Weimin1 MA Yunhai1 1. Design of hardware platform of digital adjustor for HIRFL-CSR power supply[J]. Nuclear techniques, 2010, 33(9): 705-708.DOI:
The hardware platform of digital adjustor for HIRFL-CSR power system has been developed.It is based on CycloneⅢFPGA
which is of 1 mm BGA package.The platform can run digital adjustor algorithm and satisfy specific technical requirements.ARM(Advanced RISC Machines) EP9315 microprocessor is used as the core of the control system to deal with the task of multi-threaded.And there are 1 G SFP connecting with FPGA to transmit data processed by DSP on other board
hence a great improvement of the system’s real-time performance.The hardware platform can realize a stable
reliable
real-time control for the HIRFL-CSR power supply system.